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19 December 2018

Using 50-Ohm Coax From DUT to Oscilloscope

A coaxial cable presents high impedance at low frequencies but acts as a transmission line at higher frequencies
Figure 1: A coaxial cable presents high impedance at low
frequencies but acts as a transmission line at higher frequencies
In our recent exploration of 10x passive probes, we've determined that while these types of probes are great general-purpose tools, they're not necessarily going to do the job in specialized measurement circumstances. They're relatively low-bandwidth, low-SNR probes that impose some limitations and, in some scenarios, can deliver potentially misleading or erroneous measurement results if used without clear understanding of their capabilities.

12 December 2018

Squeezing More Bandwidth From a 10x Passive Probe

Shown is a comparison of inherent oscilloscope noise and noise at the shorted tip of a 10x passive probe
Figure 1: Shown is a comparison of inherent oscilloscope
noise and noise at the shorted tip of a 10x passive probe
Now that we have a better understanding of what's happening under the hood of a 10x passive oscilloscope probe, we can sum up its key characteristics. The first thing to know about such probes is that they offer relatively low bandwidth (<100 MHz). This is largely a result of the probe's tip inductance.

28 November 2018

10x Passive Probes and Cable Reflections

Figure 1: With unequal impedances at either end of the coax, are cable reflections a concern in 10x passive probes?
Figure 1: With unequal impedances at either end of the coax,
are cable reflections a concern in 10x passive probes?
We've been discussing the ubiquitous 10x passive probe here on Test Happens, beginning with an overview of the probe-oscilloscope system. We turned to the 10x passive probe itself and the issues posed by its constitutive circuitry. Then we covered what about that circuitry makes it usable at all, namely, its built-in equalization circuit.

08 November 2018

How Tip Inductance Impacts a Probing System's Bandwidth

Shown are FFT plots of a 10-MHz, fast-edge square wave reaching the oscilloscope via direct coax connection  (orange-yellow plot) and 10x passive probe fitted with a coax tip adapter (straw-colored plot)
Figure 1: Shown are FFT plots of a 10-MHz, fast-edge square
wave reaching the oscilloscope via direct coax connection
(orange-yellow plot) and 10x passive probe fitted with a coax
tip adapter (straw-colored plot)
If you're using 10x passive probes with your oscilloscope, it's important to understand the bandwidth of your probing system and how it's affected by various methods of probing the signal of interest. There's a relatively easy way to determine this parameter by probing a fast-edge, 10-MHz signal from a square-wave generator. Doing so can also instruct us in the effects of tip inductance on the probe's bandwidth.

01 November 2018

How Equalization Works in 10x Passive Probes

The adjustable equalization circuit on the oscilloscope end of the coaxial cable compensates for the 10x passive probe's inherent low-pass filter characteristics
Figure 1: The adjustable equalization circuit on the oscilloscope
end of the coaxial cable compensates for the 10x passive
probe's inherent low-pass filter characteristics
We've been discussing 10x passive probes and their inner workings; our last post covered all the ways in which a 10x passive probe is apt to be a liability. They'd be basically unusable for any measurements at all but for one attribute: their equalization circuit (Figure 1). Without it, the 10x passive probe makes a pretty good low-pass filter, but the equalization circuit counters that with a high-pass filter to balance things out.

24 October 2018

Secrets of the 10x Passive Probe

The 10x passive probe  becomes a better measurement tool when we understand its limitations
Figure 1: The 10x passive probe
becomes a better measurement
tool when we understand its
limitations
We began this series of posts on oscilloscope probes by putting them in perspective: Probes have a number of different jobs to do, including serving effectively as both a mechanical and electrical interface. Despite having electrical attributes of their own, we want them to grab our signal of interest, but we don't want them to affect that signal in any way.

10 October 2018

Putting Probes in Perspective

Probe, cable, and oscilloscope form a system that makes or breaks the accuracy of signal acquisitions
Figure 1: Probe, cable, and oscilloscope form a system
that makes or breaks the accuracy of signal acquisitions
Few aspects of using an oscilloscope are as important as the probe: after all, the probe forms both the mechanical and electrical interfaces between the device under test (DUT) and the oscilloscope itself. To feed a signal into an oscilloscope, we're limited to a coaxial connection. Thus, we need a geometry transformer that picks up the signal of interest from the DUT and transfers it to the oscilloscope's coaxial connection.

13 September 2018

Decision Feedback Equalization

DFE filter output is based on a linear combination of previous bit decisions
Figure 1: DFE filter output is based on
a linear combination of previous bit
decisions
In debugging high-speed serial links, one must be cognizant of various forms of equalization that might be used in the link to compensate for signal degradation in the channel. Inter-symbol interference (ISI), attenuation, impedance mismatches, and insertion losses can all contribute to this loss of signal quality. To combat these effects, designers implement techniques such as continuous time linear equalization and feed-forward equalization.

30 August 2018

The Causes of Ground Bounce and How To Avoid It

This cross section of a 100-MHz microstrip transmission line shows us how a return path should look
Figure 1: This cross section of a 100-MHz microstrip
transmission line shows us how a return path should look
We've been discussing the topic of ground bounce on digital I/O lines as well as an effective way to diagnose and analyze it. We've also run through a detailed example of how to measure it using a quiet-low I/O driver as a sense line. Now, let's take a step back and examine the root causes of ground bounce, and also discuss some best design practices for avoiding it altogether.

29 August 2018

A Walk-Through of Ground-Bounce Measurements

The trigger pulse from the MCU is one clock cycle in width
Figure 1: The trigger pulse from the
MCU is one clock cycle in width
In earlier posts in this series, we've explained what ground bounce is and how it happens. We have also taken a deeper dive into the use of I/O drivers to implement sense lines that let us better quantify and analyze what kind of ground-bounce hit our system is taking. Now, let's look at a detailed example of how to measure and diagnose ground bounce.

16 August 2018

More on Quiet-Low I/O Drivers and Ground Bounce

To configure an I/O driver as a quiet-low line, its output is connected directly to Vss on the die
Figure 1: To configure an I/O driver as a quiet-low line, its
output is connected directly to Vss on the die
Ground bounce can plague digital I/O lines with bit errors and turn your hair grey trying to uncover the cause in the process. But there is a trick you can use to make the analysis a little easier: using a quiet-low I/O driver as a sense line to reveal the existence, and magnitude, of ground bounce in your system.

07 August 2018

About Ground Bounce and How to Measure It

Shown are five I/O drivers within a package driving signal lines on a PC board
Figure 1: Shown are five I/O drivers
within a package driving signal
lines on a PC board
Designing and/or troubleshooting a system with, say, an MCU driving signals across transmission lines, can be an interesting exercise in patience and diligent sleuthing. Perhaps you're seeing an inordinate amount of bit errors at the receive end of I/O lines but having some difficulty nailing down the source. In many cases, the problem is ground bounce, an issue that can be tough to diagnose and cure. Let's begin an examination of the ground-bounce phenomenon by explaining how it arises and then outlining an approach for finding it.

23 July 2018

Feed-Forward Equalization

FFE creates a number of delayed versions of the input signal that are then added back to the signal with proper weights
Figure 1: FFE creates a number of delayed versions of the
input signal that are then added back to the signal with
proper weights
In addition to continuous time linear equalization (CTLE), another means of improving signal quality at the receiver end of a high-speed serial data link is known as feed-forward equalization (FFE). In terms of implementation, FFE is not unlike the pre-emphasis filtering that is done on the transmitter side. An FFE implementation looks for all intents and purposes like a digital finite impulse response (FIR) filter.

17 July 2018

Continuous Time Linear Equalization

A CTLE implementation at the receiver end of a serial-data channel seeks to boost higher frequencies while not boosting noise any more than necessary
Figure 1: A CTLE implementation at the receiver end of a
serial-data channel seeks to boost higher frequencies while
not boosting noise any more than necessary
We've been looking at the broad topic of debugging high-speed serial links, and in that context, we're also touching on ways to improve signal performance on the receiver side. One of those ways is to implement continuous time linear equalization (CTLE).

10 July 2018

Serial-Data Channel Emulation and S Parameters

Higher data rates + "same old" channel media = degraded signal quality at receiver
Figure 1: Higher data rates + "same old" channel media
= degraded signal quality at receiver
Serial data rates have risen but propagation media for the channel remain unchanged, and that results in greater attenuation to the frequencies of interest. We could ignore these losses at lower frequencies, but now that rise times are so much faster, that's not an option. Channel effects now intrude into design margins to the point where eyes deteriorate and bit-error rates become unacceptable.

29 June 2018

The Effects of De-Emphasis on Eye Diagrams

This "at the receiver" eye diagram of a serial-data stream shows the effect a lossy channel has on signal quality
Figure 1: This eye diagram of a serial-data stream as measured
at the receiver shows the effect a lossy channel has
on signal quality
Having discussed what transmit pre-emphasis is all about and the various ways in which it's implemented, it might be useful at this juncture to look at some examples of its application and the salutary effect it can have on the signal's eye diagram at the receiver end of the channel. Recall that there are two variations on pre-emphasis: de-emphasis and pre-shoot, which use different taps of a three-tap finite impulse response (FIR) filter to emphasize the last bit or the first bit of a bit sequence, respectively.

27 June 2018

Introduction to Channel Equalization

Transmit pre-emphasis pre-distorts signals in anticipation of the channel's effects
Figure 1: Transmit pre-emphasis pre-distorts signals
in anticipation of the channel's effects
A number of factors can cause degradation of performance in a high-speed serial data link. Among them are inter-symbol interference (ISI) jitter, attenuation, reflections due to impedance mismatches, and insertion losses, to name a few. But fear not: There are techniques one may use to compensate for these losses known as equalization. We'll review the basics of channel equalization in today's post.

19 June 2018

Rise-Time Degradation and ISI Jitter

Shown are the signals from two extreme bit patterns overlaid on top of each other with no interconnect in the channel
Figure 1: Shown are the signals from two extreme bit patterns
overlaid on top of each other with no interconnect in the channel
In discussing inter-symbol interference (ISI), the phenomenon in which information "leaks" from one bit to subsequent bits, we've identified a couple of root causes of ISI jitter. The first is reflection losses caused by impedance discontinuities, while the second is group delay dispersion, a consequence of the differing propagation speeds of different frequencies through a given material. We looked at these forms of distortion in both the time and frequency domains.

13 June 2018

Inter-Symbol Interference (or Leaky Bits)

Inter-symbol interference, or ISI jitter, is the result of information from one bit "leaking" to subsequent bits
Figure 1: Inter-symbol interference, or ISI jitter, is the result
of information from one bit "leaking" to subsequent bits
In reviewing the subject of debugging high-speed serial links, one important aspect of signal integrity we must touch on is inter-symbol interference (ISI). ISI is the phenomenon in which information from one bit "leaks" to some subsequent number of bits.

12 June 2018

How Much Transmission-Line Loss is Too Much?

This plot represents the differential insertion-loss profile for a 20" FR-4 microstrip trace
Figure 1: This plot represents the differential insertion-loss
profile for a 20" FR-4 microstrip trace
One of the fundamental facts of transmission lines is losses. Any effort to debug the performance of a high-speed serial data link begins there. But it begs an equally fundamental question: How much loss in a transmission line is too much? How do we quantify losses, and what is the connection between attenuation at the Nyquist frequency and the eye diagram? Is there a rule of thumb one might apply, some sort of rough estimate of how much loss might be too much for your channel to bear at a given data rate?

06 June 2018

A Look at Transmission-Line Losses

Using a 3D field solver to simulate a differential trace
Figure 1: Using a 3D
field solver to simulate
a differential trace
In surveying the subject of debugging high-speed serial data links, we've noted that there's no one cause for signal-integrity issues between transmitter and receiver, and there's certainly no one solution. But let's begin with the low-hanging fruit: electrical losses in the transmission line. We've previously done a series of posts on transmission lines (beginning here), but it's worth it to have a quick refresher.

05 June 2018

Introduction to Debugging High-Speed Serial Links

These images depict the degradation of serial data traffic as it makes its way from transmitter to receiver
Figure 1: These images depict the degradation of serial data
traffic as it makes its way from transmitter to receiver
In recent years, the data rates in serial links have increased exponentially across any number of standard protocols, including PCI Express, USB, and even SATA and SAS. With higher data rates comes more challenges for system designers, validation engineers, and test engineers with respect to signal integrity (SI). Some SI effects are much more prominent at higher data rates than they were for lower-speed versions of the same protocols. In this series of posts, we'll examine these SI effects, look at some methods of improving system performance, and discuss some SI analysis solutions as well as measurement considerations.

18 May 2018

Examples of IoT DDR Debug Scenarios

Using the oscilloscope's Track math function can help pin down timing anomalies
Figure 1: Using the oscilloscope's Track
math function can help pin down
timing anomalies
Our last post considered some broad aspects of debugging DDR memory on Internet of Things (IoT) devices, such as how chip interposers can help with probing access and the benefits of virtual probing software. Let's now take a look at some particular examples of problems with these memory chips and their controllers and see how debugging with an oscilloscope might be approached.

15 May 2018

Debugging DDR Memory on IoT Devices

Embedded systems such as IoT devices often require chip interposers to gain access to signal lines on DDR memory
Figure 1: Embedded systems such as IoT devices often require
chip interposers to gain access to signal lines on DDR memory
Internet of Things (IoT) devices are, at heart, just another embedded computing system, albeit one with an extremely well-defined function. As such, there's bound to be some amount of on-board data storage, and the storage medium of choice these days is typically double data-rate (DDR) memory. DDR memory transfers serial data on both the rising and falling edges of the clock signal, which is the characteristic from which it derives its name.

10 May 2018

Debugging Ethernet, SATA, and PCIe for IoT Devices

A generic IoT block diagram shows serial-data links in blue
Figure 1: A generic IoT block diagram
shows serial-data links in blue
In our ongoing review of debugging serial-data standards for Internet of Things (IoT) devices, let's now turn to three more popular protocols: Ethernet, SATA, and PCIe. Ethernet is found in computer networking applications, while the Serial Advanced Technology Attachment (SATA) connects host bus adapters to mass-storage devices. The Peripheral Component Interconnect Express (PCI Express or PCIe) handles communication between root complexes (motherboards) and expansion-card interfaces.

08 May 2018

Debugging CANbus For IoT Devices

Temperature data from thermocouples is shown both encoded and decoded on the oscilloscope's display
Figure 1: Temperature data from
thermocouples is shown both
encoded and decoded on the
oscilloscope's display
A myriad of serial-data standards come into play when we're discussing Internet of Things (IoT) devices. We've talked about I2C, SPI, and UART in a previous post. Yet another serial-bus standard that comes under the IoT umbrella is the Controller Area Network (or CANbus) standard. CANbus enables microcontrollers and peripheral devices to communicate with each other in applications without an intervening host computer. In the past, it's been typically used in automotive applications, but CANbus has found its way into a wider scope of applications of late.

04 May 2018

Debugging Low-Speed Serial Data on IoT Devices

Serial-data links handle traffic between ICs and peripheral devices in the IoT world
Figure 1: Serial-data links handle traffic between ICs
and peripheral devices in the IoT world
Our last post discussed the difficulties in acquiring the many sensor signals that may be input to a deeply embedded system such as an IoT device as well as a hardware solution to the problem. Another aspect of IoT debugging and validation is the low-speed serial data standards used to facilitate communication between ICs and between controllers and peripheral devices (Figure 1). To that end, let's take a look at three such low-speed standards: I2C, SPI, and UART.

02 May 2018

Acquiring and Characterizing IoT Sensor Signals

IoT devices use many sensors to collect data about their ambient environment
Figure 1: IoT devices use many sensors to collect data
about their ambient environment
If we recall our earlier post with its definition of what constitutes an Internet-of-Things (IoT) device, one of the main functions of such devices is to sense its environment and digitize the collected data. Often, an IoT device uses many sensors to collect information about its environment (Figure 1). Having the ability to capture and analyze signals from numerous sensors simultaneously is critical to ensure proper and optimal functionality of the IoT device's design.

30 April 2018

Investigating IoT Wireless Signals (Part II)

This screen capture depicts frequency demodulation and subsequent Manchester decoding of the bit stream
Figure 1: This screen capture depicts frequency demodulation
and subsequent Manchester decoding of the bit stream
Internet of Things (IoT) devices must communicate with their peers--other IoT devices--as well as with the host system that governs their activities. In our previous post, we examined how to perform amplitude and frequency demodulation of RF bursts, such as Bluetooth Low Energy (BLE) advertising bursts. We'll continue with other methods of analyzing RF signals.

23 April 2018

Investigating IoT Wireless Signals

Figure 1: Many IoT devices accept wireless antennas using U.FL connectors
Figure 1: Many IoT devices accept
wireless antennas using U.FL
connectors
Many IoT devices use wireless methods to communicate with other devices or with host systems. Just as with DC power-rail signals, probing of RF signals should be done with as little noise and as non-invasively as possible and with the best possible signal fidelity. Effective probing opens the door to Wi-Fi and Bluetooth signal analysis with RF demodulation, vector signal analysis, and spectrum analysis.

19 April 2018

IoT Digital Power Management and Power Integrity

The half-bridge output current from each DC-DC phase is known as the inductor current
Figure 1: The half-bridge output
current from each DC-DC phase
is known as the inductor current
An Internet of Things (IoT) device derives its power either from a 12-V DC supply or from a battery. In either case, power is fed to one or more power rails that operate at different voltages. These rails power the CPU and other functional blocks on the PC board. In this post, we'll take a look at how to examine an IoT's power supply for proper digital power management implementation and for power integrity.

16 April 2018

Anatomy of an IoT Device

IoTs include SOCs, DDR, DPM ICs, wireless, and MCUs
Figure 1: IoTs include SOCs, DDR,
DPM ICs, wireless, and MCUs
There's already more Internet of Things (IoT) devices deployed than there are humans on Earth. That gap will increase radically in coming years, and the explosion in IoT devices means a commensurate explosion in the need for debugging tools. So what's in an IoT device to debug, anyway?

04 April 2018

Debugging the IoT

Chances are you're already using the IoT in various ways
Figure 1: Chances are you're already
using the IoT in various ways
By now, we're all familiar with the phrase "Internet of Things" (IoT); some of you may be directly involved with that concept on some level as a designer/technologist. Here, we'll begin a series of posts on the IoT with some broad discussion of what it's all about, and then segue into how oscilloscopes and related hardware/software are among the best tools available for design and debug of IoT-related devices.

15 March 2018

An Example of Three-Phase Power Measurements

Screen capture of a 10-s acquisition of AC input and PWM output of a 480-V motor drive
Figure 1: Screen capture of a 10-s acquisition of AC input
and PWM output of a 480-V motor drive
To follow up on our last post on three-phase power calculations, and to wrap up this series of posts on the fundamentals of power, we'll walk through an example of a set of three-phase power measurements. We'll base our discussion on a single screen capture of measurements taken on a 480-V motor drive with 480-V AC input and 480-V maximum drive output. For this example, we used a Teledyne LeCroy Motor Drive Analyzer.

14 March 2018

Three-Phase Power Calculations

Three-phase power calculations entail summing of the individual phases's power calculations
Figure 1: Three-phase power calculations
entail summing of the individual
phases's power calculations
Until now, our discussions of power calculations have encompassed only single-phase systems with one voltage and one current. Now we'll turn to three-phase systems, which can be thought of as a collection of three single-phase systems. In general, three-phase power calculations are a simple summing of the individual phase power calculations and should be balanced across all three phases.

13 March 2018

Power Calculations for Distorted Waveforms

The sum of many sine waves, of varying amplitudes and frequencies, comprises the rough- looking square wave shown in red
Figure 1: The sum of many sine waves, of varying
amplitudes and frequencies, comprises the rough-
looking square wave shown in red
Our last post covered basic power calculations for pure sine waves, which are useful only up to a point in that pure sine waves are rather rare in the real world. Almost any real-world waveform carries some amount of distortion. Because distorted voltage and current waveforms comprise multiple frequencies, the relatively simple techniques used to measure power for pure, single-frequency sine waves no longer apply.

09 March 2018

Power Calculations for Pure Sine Waves

 For a purely resistive load, power = voltage * current, with both vectors in phase
Figure 1: For a purely resistive load,
power = voltage * current, with both vectors in phase
Wouldn't it be wonderful if every sine wave we encountered in the real world was pure, with no distortion? It sure would make life easier. Alas, it's pretty much never the case. But in reviewing sinusoidal power calculations, it's best that we begin with the simplest case: a single, pure sinusoidal line voltage and single, pure sinusoidal line current supplying a linear load.

Back to Basics: AC Sinusoidal Line Current

A single-phase AC current vector rotates at 50 or 60 Hz
Figure 1: A single-phase AC current
vector rotates at 50 or 60 Hz
We've reviewed the basics of AC line voltage in previous posts. Now we'll turn our attention to the other fundamental component of line power. Regardless of whether you call it "grid," "household," "line," "utility," or "mains," AC sinusoidal current is what flows from the power utility's lines into every home and business.

02 March 2018

More Basics of Three-Phase AC Sinusoidal Voltages

In the Wye three-phase connection, neutral is present but sometimes inaccessible
Figure 1: In the Wye three-phase
connection, neutral is present but
sometimes inaccessible
Our last post in this series on the essential principles of power covered the basics of three-phase voltages: their composition of three voltage vectors, how they're generated, how they're measured (line-line or line-neutral), and conversion of line-line values to line-neutral values. Here, we'll pick up the thread with more on three-phase AC voltages.

01 March 2018

Transmission Lines (Part V): Reverse-Engineering the DUT

Every DUT can be thought of as a Thevenin voltage source with some internal resistance
Figure 1: Every DUT can be thought of as a Thevenin
voltage source with some internal resistance
There are always two primary elements of any test and/or measurement application: the oscilloscope and the device under test (DUT). Getting valid measurement results depends, first and foremost, on the oscilloscope's capabilities given the task at hand. It also depends on what we'll call "situational awareness," or the operator's understanding of the oscilloscope and of the characteristics of the DUT.

27 February 2018

Transmission Lines (Part IV): More Essential Principles

The return current in a transmission line is as important as the signal current
Figure 1: The return current in a transmission line
is as important as the signal current
In our continuing survey of the topic of transmission lines, we'd begun in our last post to cover some essential principles that govern their behavior. We're not quite done with those, so in this post we'll discuss more principles that should be part of the foundation of how you think about interconnects.

26 February 2018

Transmission Lines (Part III): Essential Principles

All interconnects are transmission lines with a signal path and a return path (not ground)
Figure 1: All interconnects are transmission lines with a signal
path and a return path (not ground)
Now that we've covered some of the principles and assumptions that underlie transmission lines in two prior posts, we can now directly address the topic with some essential principles that you need to understand.

23 February 2018

Transmission Lines (Part II): More on Bandwidth vs. Rise Time

In the frequency domain (right), a near-ideal square wave displays predictable 1/f amplitude dropoff
Figure 1: In the frequency domain (right), a near-ideal
square wave displays predictable 1/f amplitude dropoff
We began this series about transmission lines by thinking about some pertinent principles and relationships that can help form our thinking about the topic. In particular, we'd covered the relationship between bandwidth and rise time and why we have this rule of thumb that says that bandwidth can be estimated using 0.35/10-90% rise time.

20 February 2018

Transmission Lines (Part I): Introduction

All oscilloscopes have a Cal output like the one pictured here
Figure 1: All oscilloscopes
have a Cal output like the
one pictured here
Somewhere on the front panel of almost any oscilloscope is a "Cal" reference signal output (Figure 1). That signal is really intended for adjusting the capacitance compensation screw to calibrate a 10X high-impedance probe, but most of us know it simply as the Cal signal. Have you ever noticed that the Cal signal's rise time seems to be highly dependent on the length of the cable attached to it, and maybe even wondered why?

16 February 2018

Probing Techniques and Tradeoffs (Part XI): Non-Ideal Situations

VP@Rcvr builds a transmission-line model to virtually move less-than-ideal probing points
Figure 1: VP@Rcvr builds a transmission-line model
to virtually move less-than-ideal probing points
In using an oscilloscope to investigate transmission-line performance, we often encounter situations in which we don't have the luxury of probing at the ideal location. Fortunately, there are software tools that enable us to virtually move our probing point close to the receiver.

12 February 2018

Probing Techniques and Tradeoffs (Part X): More Best Practices

Chip clips; they're not just for snacks anymore
Figure 1: Chip clips;
they're not just for
snacks anymore
In probing circuits, as with most endeavors, there are some best practices you can use to enhance your chances of obtaining optimal measurements. We began exploring this concept in our last post, and we'll continue here with more best practices.

09 February 2018

Probing Techniques and Tradeoffs (Part IX): Best Practices

The typical manner of using a hands-free probe holder can cause issues
Figure 1: The typical manner
of using a hands-free probe
holder can cause issues
Having covered many of the theoretical aspects of probing signals, it's now useful to cover some best practices for high-speed active probing. We'll use some examples involving probing of DDR memory to illustrate what works best and what might not be a good idea from a practical standpoint.

08 February 2018

Probing Techniques and Tradeoffs (Part VIII): Gain/Attenuation vs. Noise

Noise comparison of a Teledyne LeCroy D1605 probe and a competing model
Figure 1: Noise comparison of a
Teledyne LeCroy D1605 probe and
a competing model
When discussing oscilloscope probes and dynamic range as we've been doing of late, we must also touch upon the associated topics of internal gain/attenuation and how that relates to noise.

06 February 2018

Probing Techniques and Tradeoffs (Part VII): More on Dynamic Range

Input offset range is how much differential offset a probe can apply to an input signal to bring it within its differential-mode output range
Figure 1: Input offset range is how much
differential offset a probe can apply to
an input signal to bring it within its
differential-mode output range
In our last post in this series, we'd begun discussing the third of three types of dynamic range as applied to probes, and that is input offset range. This is the maximum differential offset that a probe can apply to the input signal to bring it within the probe's differential-mode dynamic range.

05 February 2018

Getting The Most Out Of Your Oscilloscope: Physical-Layer Tools

Trigger dialog boxes will match the protocol of interest
Figure 1: Trigger dialog boxes will
match the protocol of interest
Debugging and validation of the physical layer of serial-data links is a preeminent oscilloscope application area these days. Today's real-time digital oscilloscopes have a wealth of tools to help you dig into any/all serial protocols and learn what's really going on electrically with your serial links.