You need to test, we're here to help.

You need to test, we're here to help.

08 August 2022

Using TF-USB-C-HS for USB 3.2 PHY-Logic Layer Debug

Figure 1. USB 3.2 electrical decoding with ProtoSync
view of protocol packets, captured using TF-USB-C-HS.
Click on any image to enlarge it.
In a USB-C connector, link training for USB 3.1/3.2 is negotiated using an LTSSM (Link Training and Status State Machine) through electrical signaling on the TX1/RX1 and TX2/RX2 connector pins. Link training must be completed on the link before high-speed data transactions can occur.  One problem you might encounter during link training is a failure to train to USB 3.2 Gen 2 specifications. Teledyne LeCroy customers report that most system-interoperability problems are caused by either link-training or sideband-negotiation failures, which in turn can result from an electrical problem, a digital problem or a combination of both. 

TF-USB-C-HS enables you to probe all points on the USB-C connector to measure and analyze live links. The insertion-loss profile of the included cable and coupon is tuned to be the equivalent of a golden 0.8-m USB Type-C cable, so you can replace a 0.8-m cable with the coupon and not experience any difference in link performance. The coupon also has a loop to allow a current probe to make load-current measurements, and the HS version is compatible with Teledyne LeCroy DH Series probes for making high-speed differential measurements.

We'll show how to trigger, acquire and decode to find problematic link training packets synchronous with the physical-layer electrical waveforms, so you can tell if the source of your interoperability  problem is electrical, logical or both.