Removing Oscilloscope Noise from PCIe 6.0 Compliance Pattern Measurements

Figure 1. The new SDAIII-PCIE6 option offers
three methods for removing oscilloscope noise
from PCIe 6.0 Compliance Pattern measurements
as required by the standard.

The new SDAIII-PAMx and SDAIII-PCIE6 options for Teledyne LeCroy oscilloscopes enable you to quickly make new PCIe 6.0 noise measurements SNDR and RLM with the oscilloscope baseline noise removed, as required by the standard.

Here's a brief description of the three, proprietary noise removal methods from which you can choose.

Manual Method

Manual uses the specified amount of oscilloscope noise for the 𝜎scope variable in the SNDRnr formula (described in the last post). This method is useful if you have previously measured your oscilloscope baseline noise and know what value to enter.

New PCIe 6.0 Compliance Pattern Measurements

PCI Express® 6.0 features significant changes from PCIe® 5.0. In particular, PCIe 6.0 achieves its 64-GT/s data rate, double that of PCIe 5.0, by moving from non-return-to-zero (NRZ) signaling to four-level pulse-amplitude-modulation (PAM4) signaling. Consequently, PCIe 6.0 requires some new test methodologies and patterns, including a new PAM4 Compliance Pattern that finds use in multiple measurements.

Figure 1. The new PCIe 6.0 Compliance Pattern signal. Click any image to enlarge.

The new Compliance Pattern is used for calculating signal to noise and distortion ratio (SNDR), as well as ps21TX (the package insertion loss) and the transmitter ratio of level mismatch (RLM). In addition, it is used to measure transmitter equalization coefficients.

Eliminating DC Resistively Coupled Noise: A Signal and Power Integrity Tutorial

Figure 8. The measured voltage noise on the victim
trace, on the other side of the ground plane gap,
showing no resistively coupled cross talk on the
order of 10 uV, the noise floor of the measurement.

The following is excerpted from Professor Eric Bogatin's article in the Signal Integrity Journal, The Case for Split Ground Planes. Reprinted by permission of Signal Integrity Journal.

This section continues from the discussion on Inductively Coupled Noise and Resistively Coupled Noise.

. . .

When we cut a gap in the return plane, there will be no DC current flow across the gap. There will be magnetic field coupling across the gap which is why we still see significant mutual inductance coupling between the aggressor and victim across the gap. The gap has only a small impact on this noise.

However, we would expect there would be no resistively coupled noise on the victim trace on the other side of the ground plane gap. In Figure 8, the resistively coupled noise is measured with the same scale and averaging as the noise on the victim line with no gap. The noise floor of this measurement is about 10 uV. To this level, there is no measurable resistively coupled noise, a significant reduction. 

Inductively Coupled Noise and Resistively Coupled Noise: A Signal and Power Integrity Tutorial

Figure 6. Measuring the inductively coupled noise
on the victim trace adjacent to the aggressor
signal with no gap and separated by a gap.
The inductively coupled noise is reduced by
about 40% on the victim trace separated by a gap.
This is a small impact.

The following is excerpted from Professor Eric Bogatin's article in the Signal Integrity Journal, The Case for Split Ground Planes. Reprinted by permission of Signal Integrity Journal.

This section continues from the discussion on Return Current at Low Frequency.

. . .

Inductively Coupled Noise

In a plane, at frequencies below about 10 kHz, return currents will not flow under the signal path, but will spread out in the return plane. Above 10 kHz, the return currents are localized under the signal paths. 

When we have two adjacent signal paths that are over a wide, continuous plane, they will show inductive cross talk at high frequency. Even with minimal overlap of the return currents, there is still loop mutual inductance between the two signal-return paths. This inductive noise is driven by the changing current, the dI/dt, in the aggressor signal-return path, which will get smaller at lower frequency.

Return Current at Low Frequency: A Signal and Power Integrity Tutorial

Figure 3. Specially configured coax cable with
the front and back of the shield shorted together.

The following is excerpted from Professor Eric Bogatin's article in the Signal Integrity Journal, The Case for Split Ground Planes. Reprinted by permission of Signal Integrity Journal.

This section continues the discussion in Signal Return Paths of the equation,

Z = R + j𝛚L

Where:

Z is the loop impedance of the current loop path, 

R is the series resistance of the loop and 

L is the loop inductance of the path.

. . .

At low frequency, when the loop impedance is dominated by the R term, the current distribution in the return plane is NOT driven by the loop impedance, it is driven by the loop resistance. In the signal path, the current will spread out uniformly as any filament path in the signal conductor will have roughly the same resistance.

But the current filaments in the return path with the lowest R will be those which are shortest. This means that return currents will take the shortest paths, independent of the signal paths. As frequency increases, the return current will redistribute to transition from the path of lowest R to the path of lowest L. 

Signal Return Paths: A Signal and Power Integrity Tutorial

Figure 1. Current distribution in the signal and
return conductors at three different frequencies.
The current redistribution at higher frequency
is driven by the currents taking filament paths
with the lowest loop inductance. 

The following is excerpted from Professor Eric Bogatin's article in the Signal Integrity Journal, The Case for Split Ground Planes. Reprinted by permission of Signal Integrity Journal.

. . .

Why Continuous Return Path Planes

The first step in engineering interconnects to reduce noise is to provide a continuous, low impedance return path to control the impedance, which controls reflection noise, and reduce the cross talk between signals that also share the same return conductor. 

A wide, continuous ground plane adjacent to a signal trace will be the lowest cross talk configuration. Anything other than a wide plane means more cross talk between signal paths sharing this return conductor. This means, never add a split or gap in the return path. You would run the risk of a signal trace inadvertently crossing this discontinuity.

If a signal crosses over a split ground plane, there are two effects which compound each other. Crossing a split creates a higher impedance path for return currents that must cross the split and forces return currents from multiple signals to overlap through the same, higher impedance, common path. 

Oscilloscope Testing of 10Base-T1S Automotive Ethernet Signal Integrity

Figure 1. The 10Base-T1S TDME option features
easy eye diagram creation for signal integrity analysis.
Click on any image to enlarge it.

In addition to special serial data bus measurements of 10Base-T1S signals, the 10Base-T1S Trigger, Decode, Measure/Graph & Eye Diagram (TDME) option automates the generation and display of eye diagrams on Teledyne LeCroy oscilloscopes. Eye diagrams are an important element of serial data analysis, used to understand the signal integrity of the communications network. 

The eye diagram is a general-purpose tool for analyzing serial digital communications signals. It shows the effects of additive vertical noise, horizontal jitter, duty cycle distortion, inter-symbol interference, and crosstalk on a serial data stream. 

The eye diagram is formed by overlaying repetitive occurrences of slightly more than a single clock period (UI) of a serial data signal on a persistence display which shows the accumulated history of multiple acquisitions, as shown in Figure 1.

Due to the use of Differential Manchester encoding (DME), the 10Base-T1S eye is formed with twice the signal clock rate. The signal shown has a symbol rate of 12.5 Mbps and the eye is clocked at 25 Mbps. 

How to Test Noisy Power Supply Outputs

Figure 1: 3.3 V output of a DC-DC converter.
The waveform shows the nominal DC level,
ripple and high frequency noise bursts.

Did you ever acquire the output of a power supply with your oscilloscope and find an unexpectedly high level of noise? Did you try adding filter capacitors only to find the noise level was not changed? 

In this post, we'll discuss how the choice of probe affects the noise present in power measurements, as well as how oscilloscope settings such as termination impedance, bandwidth and coupling can be adjusted to lessen noise and improve measurement results.

Figure 1 shows a typical DC-DC converter output measurement. The mean value of the waveform is 3.294 V.  Ripple appears at the switching frequency of 1.2 MHz, and noise in the form of high frequency bursts and baseline thickening is visible throughout.

Waveforms like this can be acquired with a 10:1 high impedance probe, a 1:1 coaxial cable connection, or a 1.2:1 rail probe using either DC or AC coupling, as available.  Figure 2 summarizes how each oscilloscope/probe configuration affects the measurement.

MAUI Studio Pro: Generating Waveforms

Figure 1: MAUI Studio Pro lets you generate
multiple waveform types from equation.

MAUI® Studio includes a simple waveform generator that enables you to create any of six standard waveforms or a DC current simply by enter a few waveform properties, such as frequency and amplitude. The waveforms are continuously generated and act like a live, repetitive waveform acquisition for simulation exercises. 

MAUI Studio Pro adds to that a true, arbitrary function generator. Numerous different waveform types can be generated from equation, and custom jitter/noise characteristics can be added to any generated waveform. 

Automotive Ethernet MDI S-parameter Testing

Figure 1: MDI S-parameter tests treat the Base-T1
pair as a balance transmission line and check that
reflections don't cause either excessive power loss
or mode conversion that can disrupt the signal.

As said earlier, the automotive industry has very stringent EMC/EMI requirements, and all Automotive Ethernet standards are designed to ensure good operation even in the presence of high EMI. Not only is there the potential for interference from all the different electronic systems within the vehicle, nothing is stopping you from parking your vehicle below high-voltage transmission wires or in other high EMI fields. 

For this reason, all Automotive Ethernet standards have defined S-parameter tests to be performed at the Medium Dependent Interface (MDI). The assumption is that the single twisted pair that is the basis for all Base-T1 transmissions can be treated as a balanced, differential transmission line with some crosstalk. It is a very real-world application of S-parameters, which can seem so academic.

Two, mixed-mode S-parameters are measured at the MDI reference plane. The tests ensure that there is neither too much loss of power from reflections, nor too much mode conversion into differential signal, that it will disrupt the information of the PAM3 encoded signal.

Fundamentals of Power Integrity: Mutual Aggressors and Rail Transient Response Measurement

Fig 1. Rail droop in response to a load step is
a typical case of mutual aggressors in a PDN.

A third type of noise found in PDNs is what we call mutual aggressors, which is crosstalk coupling from one component of the PDN onto another.

An obvious example is a load step in the PDA, where something in the system being turned on pulls current from the VRM that supplies a rail. In Figure 1, you can see how the output voltage of the VRM supplying a 1 V rail droops in response to a load step before it recovers. This is still noise: it is a signal variation that we're not expecting and don't want.

We want to be able to characterize that noise, because too much droop could affect the operation of other components that are already consuming power from that device.

In order to do so, we’re going to measure the rail transient response to the load application. We need only look at two signals: the voltage and the current on the rail of interest. Figure 1 shows the voltage on C5 (the green trace) and the current on C8 (the orange trace).

Your Ground Bounce Questions Answered

Figure 1. Line set to "quiet low" shows ground
bounce occurring as I/O driver switches.

During an October 2020 webinar, Don’t Let Ground Bounce RuinYour Day, Dr. Eric Bogatin was asked several questions regarding his topic of presentation. Here are his answers.

Q: From what frequency should we consider ground bounce to be a problem?

A: Ground bounce is really due to a dI/dt. Generally, it becomes a problem with rise times shorter than 100 ns. The bandwidth of this is about 3.5 MHz. This means ground bounce can be an issue at relatively low frequency.

Fundamentals of Power Integrity: Board Pollution

Figure 1. "Pollution" occurring on PDN traces.

Board pollution is noise occurring on the packages and interconnects (traces and planes) that carry current from the VRMs to the consumer devices.
One place it can originate is from the VRM itself, for example, with the switching noise the VRM generates (Figure 1). That can be a real concern if the board capacitance means you have a resonance around the switching frequency that would act as an amplifier for the switching noise and cause all kinds of problems with other devices on the board.

Fundamentals of Power Integrity: Self-aggression Noise

Fig. 1: VRM-switching noise is a self aggressor that can be
identified because it is synchronous with the PWM clock. 

Self-aggression noise is so-called because it is inflicted by a component onto itself through its normal operation; nothing else in the system is affecting it. When we look for this, we want to ensure the system is in a steady state, in a place where the noise environment is fairly clear (e.g., the device is on an evaluation board).

An example of self-aggression would be VRM-switching noise. Figure 1 shows ripple on a 900 millivolt rail (yellow trace) at a time when no load is present. One of the things that tells us this is switching noise is that it is synchronous to the PWM clock (red trace). Ripple that is synchronous with the switching clock is a typical figure of merit for identifying switching noise.

Fundamentals of Power Integrity: Characterizing PDN Noise

Figure 1. Noise tolerances for embedded system
components are becoming ever tighter.

Power integrity concerns maintaining the quality of power from generation to consumption in an embedded system. “Good” power integrity could be defined as having noise levels that are within tolerance. This short series will focus on characterizing noise on your power delivery network (PDN), with the goal of knowing where you must adjust your design to meet those tolerances.

Why do we care about voltage rail noise? As electronic designs strive for ever lower power consumption, power rails already carry very low voltages, often 1 V or less. Components like RF receivers, ADCs and DACs can be affected by noise of less than 1% of the rail value (Figure 1). This means noise tolerances can be as tight as single-digit millivolts, which is why power integrity takes up considerable validation time in labs.

Probing Techniques and Tradeoffs (Part VIII): Gain/Attenuation vs. Noise

Figure 1: Noise comparison of a
Teledyne LeCroy D1605 probe and
a competing model

When discussing oscilloscope probes and dynamic range as we've been doing of late, we must also touch upon the associated topics of internal gain/attenuation and how that relates to noise.

Probing Techniques and Tradeoffs (Part II)

Figure 1: A snapshot of available probes from
Teledyne LeCroy

Our first post in this series concentrated on connectivity and various means by which one might apply an oscilloscope probe to a circuit or device under test. Now, we'll look at an "ideal" probe vs. a real-world probe, and then begin a discussion of probe specifications.

Test Challenges for PAM4 Signals

The major test challenges posed by PAM4 signals

PAM4 encoding offers the advantage of doubling the bit rate in a serial data channel, doing so by increasing the number of voltage levels from two to four. It's a fairly complex modulation scheme, so it should be no surprise that it presents some test and measurement challenges.

Check Constellation Diagrams for Digital Data Integrity

Data-communication systems that rely on quadrature signal generation to phase-encode data can run into a number of signal-corrupting snags. These can include things like Gaussian noise, non-coherent single-frequency interference, phase noise, and attenuation in the channel and/or receiver, to name a few. But did you know that you can use your digital oscilloscope to diagnose problems like these?

You Can’t Eliminate Noise You Can’t Measure

Noise within a circuit or system is, by most anyone’s definition, the bane of the engineer’s existence. It can be maddening to track down and even more so to solve. It can come from many different sources, from thermal problems to cold solder joints to grounding issues, and often from more than one at the same time. On top of that, it’s a random phenomenon by nature. Noise detection and analysis is a matter of having the right tool(s). It’s especially helpful if those tools span the time, frequency, and statistical domains. Naturally, an oscilloscope is the go-to tool for noise measurement and analysis.