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16 May 2022

Oscilloscope Basics: External, Line and Fast Edge "Triggers"

An oscilloscope trigger synchronizes the oscilloscope timebase to the input signal so that the displayed trace is stable. In digital storage oscilloscopes, while the digitizer runs continuously converting analog voltage/current inputs to digital values, it is the trigger event that defines the “acquisition window,” marking the point where data is stored to acquisition memory, locking the signal data for display, measurement and further processing. 

Figure 1: The trigger setup showing the possible choices for the trigger source.

Triggers are set to fire based on the state of a trigger source waveform. What are commonly known as External, Line and Fast Edge "triggers" are not really different trigger types, per se, but alternative trigger sources.  Figure 1 shows the typical setup options for an Edge trigger, the most commonly used trigger type.  With Edge triggering, the oscilloscope is triggered when the source waveform crosses a user-defined threshold level and slope.  Usually, the source will be analog input channel C1-Cn. However, three other sources can be used to initiate an Edge trigger: an Ext(ernal) input, the Line (mains) power and, on some oscilloscopes, the built-in Fast Edge signal. 

09 May 2022

Measuring Clock Jitter Sensitivity to Power Rail Noise, Pt. 2

Figure 1. 400 mVpp oscillation on the power trace
is due to 48 MHz clock noise.

In Part 1, we used a function generator to create a power source with a known perturbation. Seeing that the noise on the power rail and the clock period were synchronous when we observed both traces together using a WavePro HD oscilloscope, we knew that there was a clear relationship between the two to be further investigated. Now, we're ready to examine more closely how the clock jitter responds to voltage variations on the power rail.

02 May 2022

Measuring Clock Jitter Sensitivity to Power Rail Noise, Pt. 1

Figure 1. Voltage variations on the power rail
shown in the same grid as the clock period track
(jitter track). These waveforms are the basis of
the clock jitter sensitivity measurement. The
inverse relationship between the jitter track and
the power trace shows that the clock
is sensitive to variations in rail voltage.

In a previous post, we described A Robust Method for Measuring Clock Jitter with Oscilloscopes as variation in a clock signal’s period. Clock jitter is characterized by the standard deviation (sdev) of the clock period measurement. The track function of the clock period sdev shows us the variations in jitter over time, synchronous with the waveform source. 

In this post and the next, we’ll show how to make use of the clock period track function to match jitter variations to possible sources of jitter, in particular to voltage variations on the clock power rail. The offset voltage of a function generator powers a clock signal source. By creating a known variation in the function generator output, we can match that to the resulting clock jitter to calculate the clock jitter sensitivity to rail voltage changes. A known clock jitter sensitivity value can help you predict how a design will respond to rail voltage changes.

As in our previous post, the clock is a 5-stage ring oscillator based on the the 74AC14 hex inverter, powered by a 5 V rail. The test instrument is a WavePro HD 12-bit, 4-Ch, 8 GHz, 20 GS/s, 5 Gpts oscilloscope with 50 ps time resolution and 60 fs intrinsic sample clock jitter, which is used to measure a square wave clock signal between 10 and 66 MHz. For this experiment, we also use a 5 V DC clean power source to test what our clock jitter is with an “ideal” rail, and a function generator to generate a perturbing signal that will put noise on our 5 V power rail so we can test how the clock jitter responds to it.