What Happens When You Connect a USB-C Cable

The USB Type-C® connector is designed to be very simple for the user to use: you insert it in either orientation, and a multitude of services just “work”. Though simple to use, it is a complicated connector to program and test, with a very complex system of protocols behind it. There is USB power delivery (USB-PD) and multiple rates of USB data delivery from USB 2.0 through USB4®, specified by the USB Implementers Forum (USB-IF®). There are protocols other than USB, such as DisplayPort™, High-Definition Multimedia Interface (HDMI™), Peripheral Component Interconnect Express (PCIe®), Base-T Ethernet and Thunderbolt™. 

So, what actually happens when you connect a USB-C cable? To understand that, first let’s take a look at the signals and pin assignments in the USB-C connector receptacle (Figure 1).

Figure 1: The USB-C receptacle pin assignments showing the key signals used for device-to-device communications. Related pins have matching color overlays.

TDME Primer: Automated Timing Measurements of USB-C Protocols

Figure 1: Interleaved decoding of USB-PD and DP-AUX signals.

Increasingly, serial data analysis is analysis of the interoperability of the many protocols that must perform together within interconnects and embedded systems. Nowhere is this more true than for USB-C® devices, which we’ll focus on in this post, although these examples of cross-protocol timing measurements could apply to any two protocols supported by our TDME and DME options.

The USB-C connector packs many protocols onto one, small pin set, and maintaining signal and power integrity is a compliance challenge. Besides high-speed data delivery, USB-PD (power delivery) provides flexible power distribution, while auxiliary sideband signals, like DisplayPort™, transport video. Troubleshooting these capabilities requires the ability to measure timing between serial data packets, as well as between data packets and analog signals. 

For example, DisplayPort over USB-C (DPoC) in alternate mode (alt-mode) can manifest as an interoperability failure if there is a timing issue between alt-mode initiation and the start of DP-AUX.

USB4 Electrical Testing: Where Are We?

Preliminary drafts of the USB4 Compliance Test Specifications (CTS) were released to USB-IF work group members in early 2020 covering the electrical through protocol layer testing of USB4 router assemblies captive cable devices. These CTS documents define the required testing for USB4 hosts, hubs, and peripherals that make up the USB4 ecosystem.  Thunderbolt 3 (TBT3) is also supported in USB4 end products and is tested using the existing TBT3 Host/Device CTS.

While the electrical test methodologies are similar to previous USB 3.2 compliance tests, USB4 is largely based off the TBT3 physical layer, and these test methods have been adopted. Here, we summarize the USB4/TBT3 test approach called out in the aforementioned documents.

USB4 Transmitter Testing

Figure 1. Test points TP2 and TP3 for USB4
Electrical Compliance Testing (Source: USB-IF)

Presently, there is no SIG-TEST software for performing transmitter (Tx) testing, although it is anticipated that one will be released by the USB-IF in the future. All Tx tests performed by QPHY-USB4-TX-RX utilize Teledyne LeCroy methods, with measurements made directly by the oscilloscope.

Figure 1 shows the Test points defined in the CTS for physical layer testing. Testing of the Tx-side is  similar to those performed for USB 3.2 in that the signal is captured at the connector (TP2), where many measurements are defined. Then, a passive cable model is embedded and equalization is applied to result in TP3 measurements.

Introduction to Debugging High-Speed Serial Links

Figure 1: These images depict the degradation of serial data
traffic as it makes its way from transmitter to receiver

In recent years, the data rates in serial links have increased exponentially across any number of standard protocols, including PCI Express, USB, and even SATA and SAS. With higher data rates comes more challenges for system designers, validation engineers, and test engineers with respect to signal integrity (SI). Some SI effects are much more prominent at higher data rates than they were for lower-speed versions of the same protocols. In this series of posts, we'll examine these SI effects, look at some methods of improving system performance, and discuss some SI analysis solutions as well as measurement considerations.

The Periodic Table of Oscilloscope Tools: Analyze (Part III)

We're nearing the end of our tour of the Periodic Table of Oscilloscope Tools, our way of presenting our broad palette of oscilloscope tools in a concise, clear fashion. In this installment, we'll finish up the Analyze grouping, by far the largest on the Periodic Table.