A Walk-Through of Ground-Bounce Measurements

Figure 1: The trigger pulse from the
MCU is one clock cycle in width

In earlier posts in this series, we've explained what ground bounce is and how it happens. We have also taken a deeper dive into the use of I/O drivers to implement sense lines that let us better quantify and analyze what kind of ground-bounce hit our system is taking. Now, let's look at a detailed example of how to measure and diagnose ground bounce.

More on Quiet-Low I/O Drivers and Ground Bounce

Figure 1: To configure an I/O driver as a quiet-low line, its
output is connected directly to Vss on the die

Ground bounce can plague digital I/O lines with bit errors and turn your hair grey trying to uncover the cause in the process. But there is a trick you can use to make the analysis a little easier: using a quiet-low I/O driver as a sense line to reveal the existence, and magnitude, of ground bounce in your system.

Making On-Die Power-Rail Measurements (Part III)

Figure 1: This screen capture shows
the idle-state conditions

Having reviewed the test setup for on-die power-rail testing and our expectations of what the tests should show us, let's walk through the measurements and look over the results. We'll also note whether our results align with our expectations or are outside of those expectations.

Making On-Die Power-Rail Measurements (Part II)

Figure 1: When switching from low to
high, PDN noise flows from the Vdd
rail through to the Vss rail

Now that we're ready to begin some on-die power-rail measurements, it's a good idea to step back for a moment and anticipate what these measurements should show us. What actually happens on the die when CMOS gates are switching on and off? What should we expect to see on the on-die power rails? And what happens at the clock edges?

Making On-Die Power-Rail Measurements (Part I)

Figure 1: Our test setup for the
on-die measurement examples

Our exploration of on-die power-rail measurements has brought us to the point of demonstrating some examples of these measurements. As noted in the prior post, we will use an Atmel 328 microcontroller demo board, prepared with firmware to control it explicitly for our purposes, and with coaxial cable in place on the bottom of the board to serve as transmission lines for our signals of interest.

Measuring Shared On-Die Power Rails

Figure 1: This schematic represents the signal paths
in typical, general-purpose I/Os

If you're taking power-rail measurements on a semiconductor die that is appropriately instrumented with sense lines and a direct connection to the die's core PDN, you're in pretty good shape. But what if that's not the case? If the die's I/O power rails are shared by the core power rails, here's a way to get your core power-rail measurements anyway.

Setting the Stage for On-Die Power-Rail Measurements

Figure 1: Measuring on-die Vdd rail noise requires
a suitably instrumented die and package

Armed with a suitable oscilloscope and active voltage-rail probe, you're now ready to make some power-rail measurements on a semiconductor die. Of course, making measurements on a die is a little different than making measurements on a printed-circuit board. This is where careful design-for-test at the die level comes in, because the chip, its packaging, and the board on which it will be mounted must be instrumented so as to make the on-die measurements possible.