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12 August 2015

Test Challenges for PAM4 Signals

The major test challenges posed by PAM4 signals
PAM4 encoding offers the advantage of doubling the bit rate in a serial data channel, doing so by increasing the number of voltage levels from two to four. It's a fairly complex modulation scheme, so it should be no surprise that it presents some test and measurement challenges.

Imagine, if you will, a plain-vanilla NRZ eye diagram, and an ideal one at that. It would have no jitter, just a finite rise and fall time.

The first thing that often comes up in discussions of PAM4 signals is: How does one recover a clock? In the case of an NRZ signal, the purpose of clock recovery is to pinpoint the crossover point, or the place at which the signal crosses the threshold (see the green circle at center left of the figure).

With a PAM4 signal, it's a similar situation except for the fact that there are four voltage levels instead of two. The two intermediary levels mean a lot more signal transitions: there's the one from the bottom level to the next one higher, and from that level to the third, and from the third to the top (blue traces c, b, and a, respectively, in the figure).

The blue trace b crosses at the same place as the black traces that cover the full amplitude range (at the green circle). Some transitions do not cross any threshold at all (blue traces in top and bottom thirds), but there are likely not as many of those as there are transitions that do cross thresholds. So considering these transitions, one may assume that traditional clock recovery would be adequate.

But then there are the transitions from the bottom level to the second level up, and from the top level to the second level down (yellow traces). Even in a perfect world, these transitions do not cross the threshold at the same place as the others (green circle). Thus, the question is whether these transitions would affect clock recovery? Will they result in clock jitter?

The answer is "not really." If we assume roughly equal numbers of transitions to the left and right of the green circle, and many more transitions than either at the green circle, then the two yellow crossings to the left and right cancel each other out. Traditional clock recovery works fine.

Speaking of jitter, the proximity of those yellow crossings to the idealized crossing location at the green circle does raise questions. Referring to the small red arrows at the right side of the figure, if one is accustomed to analyzing NRZ signals, those gaps in time do indeed look like jitter.

How does one analyze jitter on a PAM4 signal? First, let's not lose sight of the ultimate purpose of analyzing jitter at all, which is to determine our predicted bit-error ratio. We want to know where we need to sample the signal to minimize bit errors (ideally, at the red crosses at the center of each of the three eyes). Thus, what we really care about is the eye width and the position of the sampler in the receiver. The number of trajectories that build up the eye aren't the issue, but rather the eye width at a given bit-error ratio as opposed to an in-depth analysis of what's going on at the crossings.

Another challenge in the PAM4 realm is that of noise tolerance. Instead of having the full amplitude range, we have 33% of that amplitude to work with. Thus, noise analysis becomes much more important. Just as we want to understand the eye width at a given BER to know where best to situate the sampler horizontally, we also need to know where to place it vertically. Eye height at a given BER is another critical parameter.

Lastly, somewhat new for PAM4 in contrast to NRZ is the notion of linearity. In NRZ, there are only the two amplitude levels to worry about while PAM4 gives us these two intermediary amplitude levels. Are the distances a, b, and c the same so that the levels are evenly spaced and we have maximum openings for all three eyes? Does a = b = c? That's what is meant by "linearity" in the context of PAM4.

That's a quick rundown of the test and measurement challenges raised by the advent of PAM4 signaling.

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