Making New PCIe 6.0 Transmitter Equalization Measurements with Your Oscilloscope

Figure 1. Transmitter equalization test results for preset Q1.

PCI Express® 6.0 achieves its 64-GT/s data rate, double that of PCIe® 5.0, by moving from non-return-to-zero (NRZ) signaling to four-level pulse-amplitude-modulation (PAM4) signaling. This results in the need for more complex algorithms for voltage and timing measurements.

The latest release of SDAIII software for Teledyne LeCroy oscilloscopes lets you easily measure response at different transmitter equalization presets to confirm that Tx EQ is achieving the specified levels prior to taking your DUT for compliance testing. The Tx EQ measurement feature works with NRZ signals and, if you have the additional SDAIII-PAMx option, with PAM3 and PAM4 signals, too.

Transmitter Equalization Coefficients and Presets Measurement

In PCIe 6.0, transmitter equalization measurements are performed on the new PAM4 Compliance Pattern signal using the AC method that was first introduced in PCIe 5.0.

Removing Oscilloscope Noise from PCIe 6.0 Compliance Pattern Measurements

Figure 1. The new SDAIII-PCIE6 option offers
three methods for removing oscilloscope noise
from PCIe 6.0 Compliance Pattern measurements
as required by the standard.

The new SDAIII-PAMx and SDAIII-PCIE6 options for Teledyne LeCroy oscilloscopes enable you to quickly make new PCIe 6.0 noise measurements SNDR and RLM with the oscilloscope baseline noise removed, as required by the standard.

Here's a brief description of the three, proprietary noise removal methods from which you can choose.

Manual Method

Manual uses the specified amount of oscilloscope noise for the 𝜎scope variable in the SNDRnr formula (described in the last post). This method is useful if you have previously measured your oscilloscope baseline noise and know what value to enter.

New PCIe 6.0 Compliance Pattern Measurements

PCI Express® 6.0 features significant changes from PCIe® 5.0. In particular, PCIe 6.0 achieves its 64-GT/s data rate, double that of PCIe 5.0, by moving from non-return-to-zero (NRZ) signaling to four-level pulse-amplitude-modulation (PAM4) signaling. Consequently, PCIe 6.0 requires some new test methodologies and patterns, including a new PAM4 Compliance Pattern that finds use in multiple measurements.

Figure 1. The new PCIe 6.0 Compliance Pattern signal. Click any image to enlarge.

The new Compliance Pattern is used for calculating signal to noise and distortion ratio (SNDR), as well as ps21TX (the package insertion loss) and the transmitter ratio of level mismatch (RLM). In addition, it is used to measure transmitter equalization coefficients.

Get Ready for PCIe 6.0 Base Tx Testing--Compliance, Jitter and Eye Diagrams

Figure 1. The four levels and three eyes of the
PCIe 6.0 PAM4 signal.
Click on any image to enlarge.

The PCI Express® 6.0 Base specification was officially released in January 2022 at version 1.0, meaning it is considered final. The CEM and PHY test specifications are currently at version 0.3, and 0.5 versions of both will probably be released sometime in the third or fourth quarter of 2022. As both the CEM and PHY test specifications are still at an early stage, it's hard to predict exactly when the PCIe® 6.0 compliance test program will start, but it's safe to say it is at least a few years out. However, PCIe 6.0 Base testing is upon us, especially those of us working on chip design.

So, what can implementers expect as they retool for PCIe 6.0 Base Tx and Base Rx physical layer testing?