PCIe 4.0 Transmitter Electrical Testing (Part II)

Figure 1: With an add-in card as our DUT, we will measure
the transmit signal at the root complex on the system board

With PCIe 4.0 compliance workshops close at hand, let's get familiar with the compliance test process. We've set the stage for electrical transmitter tests by describing the PCIe 4.0 nominal channel and also reviewed the test-equipment requirements; now we'll begin examining the tests in some detail. The two basic transmitter tests are the preset test and signal-quality test.

PCIe 4.0 Transmitter Electrical Testing (Part I)

Figure 1: The two basic PCIe 4.0 transmitter tests
are shown above outlined in green

You've been introduced to some of the background and history that has brought the PCI Express protocol standard to its fourth generation, and we've discussed the test-equipment requirements for PCIe 4.0 electrical compliance testing. Let's begin examining the compliance testing, beginning with transmitter electrical tests.

Gearing Up for PCIe 4.0 Electrical Compliance Test

Figure 1: A key element in PCIe 4.0
compliance test is a high-bandwidth,
real-time oscilloscope (shown is the
Teledyne LeCroy LabMaster 10Zi-A)

Armed with some of the background information and history on PCIe 4.0 electrical compliance testing, we're now ready to look at just what it takes in terms of test equipment to determine compliance for a PCIe 4.0 device. With the increase in data-transfer rate from 8 Gb/s in PCIe 3.0 to 16 Gb/s in PCIe 4.0, so too have the test equipment requirements advanced.

Introduction to PCIe 4.0 Electrical Compliance Test

Figure 1: PCI Express is now in its fourth generation
and poses daunting physical-layer test challenges

The Peripheral Component Interface Express standard (PCI Express, or PCIe) has been with us for some 14 years now, a pretty good run by computer-industry standards, and it shows no signs of fading away anytime soon. Now in its fourth generation, which sports data-transfer rates up to 16 Gb/s, PCIe presents daunting physical-layer test requirements (Figure 1).

Probing Techniques and Tradeoffs (Part VI): Dynamic Range

Figure 1: Differential-mode dynamic range is the maximum
allowable voltage between the probe amplifier's inputs

We've been discussing probe loading, which is the unavoidable reality of what happens when you attach an oscilloscope probe to a live circuit. We'll now shift the discussion to dynamic range, an important topic that can be overlooked when selecting an oscilloscope probe. There are three types of dynamic range that one should understand. Each of them will influence how you set up your probe and how you set up your signal under test to most effectively get that signal into the oscilloscope's front-end amplifier.

Probing Techniques and Tradeoffs (Part V): Probe Loading

Figure 1: A probe's impedance varies
with frequency

Earlier in this series of posts, we alluded to the topic of probe loading, which is an outcome of the fact that to make a measurement, an oscilloscope probe must "steal" some energy from the circuit or device under test. Thus, the probe's tip must have a finite impedance across the frequency range of interest.

Probing Techniques and Tradeoffs (Part IV)

Figure 1: Applying bandwidth filters to a 2.5-GHz clock
signal clearly shows the effect of bandwidth on rise time

The topic of probe bandwidth is a broad and deep one. We began our discussion of bandwidth in an earlier post with some basic information about what bandwidth means and the importance of the -3 dB point. Next, we looked at a Fourier deconstruction of a square wave into its fundamental and the lower-order harmonics, and covered the importance of bandwidth in capturing enough harmonic content to understand the signal's overall shape.