Plan For Successful USB Compliance Testing (Part III)

Figure 1: In USB 3.0 link-layer compliance test,
all logical states of the LTSSM come into play

In Part I and Part II of this series on USB compliance test, we've looked at some of the basic information on compliance testing and at some aspects of physical-layer test, respectively. In this third part of the series, we'll turn our attention to USB 3.0 link-layer testing.

Plan For Successful USB Compliance Testing (Part II)

Figure 1: A representative transmitter
compliance test setup

In the first post in this series, we looked at some of the basics of USB 3.0 and 3.1 compliance test and covered the USB-IF's role in overseeing the protocol. Now, let's look into some aspects of physical-layer test.

Plan For Successful USB Compliance Testing (Part I)

Figure 1: The coveted SuperSpeed USB logo

Certifying a device's implementation of a serial protocol standard is a fairly complex process involving a number of levels: electrical test, interoperability, backward compatibility, link layer, and so on. Generally, some organization oversees a given protocol, managing the revision process for the protocol itself as well as the testing process that a product must undergo. Passing the relevant compliance test suite and having a valid Trademark License Agreement on file bestows the prized right to display the protocol's logo on the product's box (Figure 1). That logo's presence tells the product's users that their device's serial interface operates within parameters set by the overseeing organization.

Filtering Signals with MATLAB

Figure 1: A 2-pole, 1-MHz Butterworth low-pass filter
applied to an acquired waveform

Touted by its maker as "the language of technical computing," The MathWorks' MATLAB is a veritable Swiss Army knife for engineers, scientists, and perhaps anyone involved in technical endeavors. MATLAB serves a myriad of applications in programming, data analysis, application development, modeling and simulation, and... wait for it... instrument control!

What S-parameters Reveal About Interconnects (Part III)

Figure 1: How ripple is introduced into S11 and S21

S-parameters are a great tool for understanding exactly what happens to a signal as it traverses an interconnect such as a transmission line. How much of it propagates through, and how much reflects off of impedance mismatches? From plotting return loss against insertion loss, we've weighed how much return loss may be tolerable before it significantly impacts insertion loss. Now we'll turn our attention to some common patterns exhibited by S11 and S21 and what they mean to the performance of an interconnect.

What S-parameters Reveal About Interconnects (Part II)

Figure 1: Measuring S-parameters
of a two-port interconnect

Having previously covered some of the fundamentals of S-parameters, it's now time to dig a little deeper into what they can show us about an interconnect; say, for example, a two-port microstrip line on a PC board. Unlike the one-port DUT in our earlier post, this configuration gives us the opportunity to look at not only S11 (return loss or reflected signal), but also S21 (insertion loss or transmitted signal).

What S-Parameters Reveal About Interconnects

Figure 1: S-parameters are derived by applying an incident
wave to an interconnect; we can consider this process in either
the time or frequency domains

S-parameters are a popular means of characterizing an interconnect. By feeding the interconnect with a precision reference signal and measuring how much of that signal propagates through the connector and how much is reflected, we learn everything we need to know about its performance. This will be the first in a series of posts about the insights we can glean from S-parameters with practical examples of common measurement scenarios.