Making On-Die Power-Rail Measurements (Part III)

Figure 1: This screen capture shows
the idle-state conditions

Having reviewed the test setup for on-die power-rail testing and our expectations of what the tests should show us, let's walk through the measurements and look over the results. We'll also note whether our results align with our expectations or are outside of those expectations.

Making On-Die Power-Rail Measurements (Part II)

Figure 1: When switching from low to
high, PDN noise flows from the Vdd
rail through to the Vss rail

Now that we're ready to begin some on-die power-rail measurements, it's a good idea to step back for a moment and anticipate what these measurements should show us. What actually happens on the die when CMOS gates are switching on and off? What should we expect to see on the on-die power rails? And what happens at the clock edges?

Making On-Die Power-Rail Measurements (Part I)

Figure 1: Our test setup for the
on-die measurement examples

Our exploration of on-die power-rail measurements has brought us to the point of demonstrating some examples of these measurements. As noted in the prior post, we will use an Atmel 328 microcontroller demo board, prepared with firmware to control it explicitly for our purposes, and with coaxial cable in place on the bottom of the board to serve as transmission lines for our signals of interest.

Measuring Shared On-Die Power Rails

Figure 1: This schematic represents the signal paths
in typical, general-purpose I/Os

If you're taking power-rail measurements on a semiconductor die that is appropriately instrumented with sense lines and a direct connection to the die's core PDN, you're in pretty good shape. But what if that's not the case? If the die's I/O power rails are shared by the core power rails, here's a way to get your core power-rail measurements anyway.

Power-Rail Noise: Small Signal, Big DC Offset

Figure 1: Your
scope's vertical
adjust has its
limits

We've been working through the various challenges in making power-rail noise measurements. One of those challenges is RF pickup that can often swamp the noise signal, and the way around that is to ensure a coaxial connection from the oscilloscope's input down to the power rail itself. We want a high signal-to-noise ratio (SNR), so we're better off with a 1X probe than with a 10X attenuating probe. We want high bandwidth, so we want a 50-Ω termination at the oscilloscope input.

How 10X Attenuating Probes Kill Signal-to-Noise Ratio

Figure 1: Signal waveforms captured using a 10X attenuating
probe (top) and a BNC probe (bottom) with tips open

We've begun discussing things that can derail (see what we did there?) your power-rail measurements, such as the deleterious effects of RF interference. In the same context, one should always be mindful of certain characteristics of oscilloscope probes; namely, the 10X attenuating probes that are often lying around on the testbench.

Understand RF Pickup When Measuring Power Rails

Figure 1: Teledyne LeCroy's
HDO8108A sports a very low
noise floor of about 145 μV 

Measuring the noise on a power rail seems to be a straightforward task. However, there are some basic pitfalls that can cause incorrect, or even downright strange, results. Let's look at one of these challenges: RF pickup. We'll demonstrate the effect of RF pickup on a power-rail measurement, and then we'll show you an effective means of mitigating that effect.

Dynamic Range, Signal Integrity, and ESD Pulses

Figure 1: Use your oscilloscope's full vertical range to
take full advantage of the ADC's resolution

Having considered the impact of sampling rate on ESD pulse measurements, let's now turn our attention to dynamic range and signal integrity. No matter what oscilloscope you use, it's important to make the most of the instrument's full vertical range to achieve maximum accuracy.