The Evolution of In-vehicle Network Architectures

The drive for fuel-efficient and safer vehicles opened the door to electronic control in vehicles, which in turn led to the deployment of In-vehicle Networks (IVN).  IVNs have become the backbone of modern vehicles. The volume of data flowing through these networks is increasing exponentially with demands for electric vehicles, advanced driver assistance systems (ADAS), radar, lidar, infotainment systems, cameras and vehicle-to-vehicle communications systems.  

To meet this need, the automotive industry—working with technology suppliers—has developed specialized communications protocols and application-specific extensions to existing network technologies, standardized under the aegis of organizations like ISO and IEEE, and it continues to investigate new topologies and protocols to improve performance, increase reliability and lower the costs of IVNs. Two recent developments have filled a longstanding gap in IVN architectures: CAN XL (up-to-20 Mbit/S extended length CAN) and 10Base-T1S (10 Mbit/S single-pair Ethernet), both of which operate in the 10 Mbit/S network space. What problems do these protocols solve and what opportunities do they present for IVN design?

Oscilloscope Serial Data Measurements and DAC: Trigger, Decode, Measure/Graph and Eye Diagram Software

Figure 1. Serial bus measurements made available
with "TDME" and "TDMP "decoder options.

All Teledyne LeCroy oscilloscopes support a rich set of standard waveform measurement parameters, but the installation of any "TDME" or "TDMP" serial decoder software option adds special parameters designed for measuring serial data buses. Besides automating the measurement of serial bus timing, these parameters allow you to access encoded serial data and extract it to analog values for what is essentially a Digital-to-Analog Converter (DAC)!

What’s in a Name?

Teledyne LeCroy has adopted the convention of using a key in the name of our serial trigger and decode products that tells you what capabilities they offer.  The “ME” or “MP” in the name of a Teledyne LeCroy serial decoder option (e.g., CAN FDbus TDME or USB4-SB TDMP) refers to "Measure/Graph and Eye Diagram" or "Measure/Graph and Physical Layer Tests." All these options include the following 10 serial bus measurements. Physical Layer Test options will also include measurements designed specifically to meet the requirements of the standard.

Testing the DDR Memory Interface's Physical Layer (Part I)

Figure 1: Clock, strobe, and data are
three critical signals in DDR test

In an earlier post, we took a brief tour through what constitutes a DDR memory interface: clock, command, address, and strobe+data lines linking a memory controller and an array of DRAM memory ICs. Next, we'll examine what DDR interface testing is all about, concentrating primarily on the physical layer.

Fundamentals of the DDR Memory Interface

Figure 1: A representative test setup
for physical-layer DDR testing

Double data-rate (DDR) memory has ruled the roost as the main system memory in PCs for a long time. Of late, it's seeing more usage in embedded systems as well. Let's look at the fundamentals of a DDR interface and then move into physical-layer testing (Figure 1).