Some PCIe 3.0 Test Examples (Part I)

Figure 1: Protocol and electrical views of
slow electrical response to a preset request

We took a tour of a typical PCIe 3.0 testbench setup in a recent post. Now, let's see that testbench in action with some application examples of some common bad behavior one might encounter from a PCIe 3.0 channel. These include: slow electrical response, slow protocol response, and so on.

A Tour of a PCIe 3.0 Test Setup

Figure 1: Test-equipment requirements for PCIe 3.0

Having examined the complex machinations of PCIe 3.0 dynamic link equalization in earlier posts (see the links below), now we will look at a typical test setup for design and debug and/or compliance testing. Then we will move on to some test examples showing some common problems that one might encounter.

PCIe 4.0 Transmitter Link-Equalization Testing

Figure 1: Shown is an overview of the PCIe 4.0
link-equalization response test

PCI Express has seen steady, and significant, increases in bit rates in each generational revision. Most recently, bit rates leaped from 8 Gb/s in PCIe 3.0 to 16 Gb/s in the current version 4.0. With these speed increases has come the need for dynamic link equalization, which becomes necessary for the sake of signal integrity. Compliance tests for dynamic link equalization is where things start to get a little more sophisticated, particularly when it comes to PCIe 4.0

The Periodic Table of Oscilloscope Tools: Analyze (Part I)

Figure 1: Analysis tools deepen
insight into waveform behavior
and relationships

The path from problem to solution via oscilloscope moves through a number of stages. Doing so involves capture of a signal, determining how it's to be viewed, taking measurements of various parameters, and possibly applying math functions to the waveform. All of these stages depend on the roster of tools that the oscilloscope brings to bear on the process. Teledyne LeCroy's Periodic Table of Oscilloscope Tools represents our view of the world of such tools.