Some More PCIe 3.0 Test Examples (Part II)

Figure 1: This shows how a PeRT 3 state-machine log can be invaluable
in diagnosing timeouts in requests for presets

Continuing on from our last post, let's look at some more examples of common PCIe 3.0 test scenarios and how a well-equipped PCIe 3.0 testbench would approach them. Recall, if you will, that such a testbench would comprise a real-time digital oscilloscope of suitable bandwidth (such as Teledyne LeCroy's SDA830Zi-B oscilloscope), a protocol-enabled receiver tester (such as Teledyne LeCroy's PeRT 3 Phoenix System), and software that enables simultaneous, correlated views of the protocol and physical layers (such as Teledyne LeCroy's ProtoSync software).

A Tour of a PCIe 3.0 Test Setup

Figure 1: Test-equipment requirements for PCIe 3.0

Having examined the complex machinations of PCIe 3.0 dynamic link equalization in earlier posts (see the links below), now we will look at a typical test setup for design and debug and/or compliance testing. Then we will move on to some test examples showing some common problems that one might encounter.