PCIe 4.0 Transmitter Link-Equalization Testing

Figure 1: Shown is an overview of the PCIe 4.0
link-equalization response test

PCI Express has seen steady, and significant, increases in bit rates in each generational revision. Most recently, bit rates leaped from 8 Gb/s in PCIe 3.0 to 16 Gb/s in the current version 4.0. With these speed increases has come the need for dynamic link equalization, which becomes necessary for the sake of signal integrity. Compliance tests for dynamic link equalization is where things start to get a little more sophisticated, particularly when it comes to PCIe 4.0

There are two link equalization tests: Transmitter initial Tx equalization and transmitter link equalization response. The latter is more complex and thus more interesting. The former is quite similar to the transmitter preset test described in an earlier post, except instead of using a toggle button on the test fixture board to force the transmitter into each preset, you have to negotiate it into each preset using the PCIe protocol, and then perform the preset test.

Figure 2: This is the test setup for the transmitter
link-equalization response test

Figure 1 depicts an overview of the test for Tx link-equalization response time. The test begins with the BERT initiating a preset request. To do so, the BERT negotiates with the DUT at the protocol layer, which is an important capability for any BERT you might use for PCIe compliance testing. The preset request asks the DUT to change its Tx equalization preset from its present value to a new value, and the DUT responds by changing the preset.

Note that the preset request from the BERT and the DUT's response are both being acquired by the oscilloscope. We want to determine how long that response takes to happen and also ensure that the emphasis preset changed to the correct value. That's something you can only do with an oscilloscope, because you must actually observe the physical-layer emphasis change to evaluate the change in the analog signal shape. The oscilloscope uses the preset feature in the SigTest software from PCI-SIG to accomplish this.

Figure 3: Shown is an example of a Tx link-equalization
response test

Ideally, the time between the protocol-layer request by the BERT for an emphasis preset change and the actual preset transition should be <500 ns, which constitutes a passing result. That's what the PCIe 4.0 base specification calls for. The Card ElectroMechanical (CEM) specification loosens up a little and allows a transition period of between 500 ns and 1 μs, because it's a tricky measurement to make with exact precision. But a result of more than 1 μs is a failing result.

The transmitter link equalization response test setup appears in Figure 2. The signal out of the BERT's pattern generator is split so that it is sent to both the DUT's receiver and also into two oscilloscope input channels. The signal coming out of the DUT at Tx Lane 0 is also split to feed both the oscilloscope and the BERT's error detector, the latter of which permits the BERT to converse with the DUT at the protocol layer. Thus, the oscilloscope acquires both the downstream signal from the BERT to the DUT and the upstream signal from the DUT to the BERT.

Figure 4: The oscilloscope acquires both the downstream
signal from the BERT and the upstream signal from the DUT

Figure 3 shows an example of a Tx link-equalization response test. In this case, the BERT requested that the DUT change its Tx emphasis preset from P7 to P4. At the time it does so, it also sends a trigger to the oscilloscope. Referring back to Figure 2, note the connection from the BERT's AUX output to the oscilloscope's trigger-in connector. Thus, we can trigger the oscilloscope so it knows when the request for the preset change was sent.

On the oscilloscope, we see two differential signals: the downstream signal from the BERT, and the upstream signal from the DUT (Figure 4). The latter, in orange, is the digital signal from the BERT to the DUT, and somewhere in that data stream is the protocol-layer request to change the Tx emphasis preset from P7 to P4. The blue trace is the signal returning from the DUT to the BERT, and it reflects the actual change in the preset. That change is denoted by the change in the signal's analog shape, and it's rather obvious where that change occurs.

Figure 5: The protocol-layer decode of the BERT's data stream
shows the exact location of the preset change request

So we know that the point at which the signal's shape changes is the end point of the response-time measurement. But how do we locate the protocol-layer request in the downstream signal, and hence our starting point for the measurement?

This is where the oscilloscope's protocol-decode capabilities come into play. The oscilloscope decodes the downstream data; the protocol-layer decode appears in Figure 5. We can now see the actual protocol-layer decode of the downstream data from the BERT. The EQ control block (seen in detail at lower right) shows us that in packet 25, the BERT was asking for Tx emphasis preset P7, and that in packet 26 it requested P4. That's the exact point at which the preset change request took place.

Figure 6: Knowing the start and end points for the response-
time measurements now makes a result easily obtainable

If we click on packet 26 in the oscilloscope's protocol-layer decode software, it tells the oscilloscope to highlight that exact packet in the analog waveform. Now we know both where the preset change request was made in the downstream signal from the BERT to the DUT, and where the analog signal changed shape in the upstream signal from the DUT to the BERT. All that remains is to measure the time, t, between those two points.

Figure 6 gives us the measurement of the response time from protocol-layer request to physical-layer Tx emphasis change: 81.18 ns. With a pass/fail limit of 1 μs, this is an easy passing test result. It even gets us well below the desired 500-ns time for the response.

All of the above adds up to a fairly sophisticated test that requires much of the test system's components. Not only does it require an oscilloscope with a real-time bandwidth of at least 25 GHz, that oscilloscope needs to be able to decode the PCIe 4.0 data stream to find the exact point at which the Tx emphasis change request occurred. Then, the BERT must not only have the pattern generator and error detector operating at the right bit rate, but it must also be able to perform the link training and state-machine analysis for all the protocol-level negotiation.

Coming up next is a look at PCIe 4.0 receiver link-equalization testing procedures.

Earlier posts in this series:

Introduction to PCIe 4.0 Electrical Compliance Test
Gearing Up for PCIe 4.0 Electrical Compliance Test
PCIe 4.0 Transmitter Electrical Testing (Part I)
PCIe 4.0 Transmitter Electrical Testing (Part II)