You need to test, we're here to help.

You need to test, we're here to help.
Showing posts with label quiet lines. Show all posts
Showing posts with label quiet lines. Show all posts

01 August 2022

Signal and Power Integrity Tutorial: Power Rail Probing for Rail Compression

Figure 3. Equivalent circuit of a typical CMOS I/O showing the connection from the on-die rails and the board-level test points.
Figure 3. Equivalent circuit of a typical CMOS I/O
showing the connection from the on-die rails
and the board-level test points.
By Prof. Eric Bogatin,
Teledyne LeCroy Fellow

Excerpted by permission from the Signal Integrity Journal article, Measuring Only Board-level Power Rail Noise May Be Misleading

Continued from Part 1.


Measuring Rail Compression on the Die

In most applications, we do not have access to the bare die when the chip is assembled on the circuit board. If the IC package has not been instrumented with special pass-through features connecting the rails on the die to board pins, we have to rely on a special trick. [The use of a quiet HIGH and quiet LOW]

When the I/Os of a chip all share the same power and ground rails, which is often the case in small microcontroller devices, designated I/Os can be used as sense lines to measure externally the power rails on the die.