Finding “Unknown” Waveform Anomalies

Figure 1: Width “exclusion” trigger captures
pulse widths outside the range of 980 ns to 1 µs.
The first anomaly captured is a width of 2.99 µs.

Using SmartTriggers® and statistics to find waveform anomalies is easy if you know the characteristics of the anomaly, but how do you find intermittent, anomalous events when you don’t know what you’re looking for? The answer: start with what you do know!  

Look for What’s “Not Normal”

A simple approach is to measure the nominal waveform, then trigger the oscilloscope on waveform elements that differ from nominal. Figure 1 shows a 500 kHz square wave with a roughly 50% duty cycle, so the pulse width is normally about 1 µs (the Width measurement shows a mean of 997 ns). This nominal width does not change significantly with any regularity and gives us a basis on which to begin looking for anomalies.

Finding Intermittent Events

Figure 1: Statistics for 1261 Width measurements
taken over 97 acquisitions on the Measure table.
Width statistics can help determine the set up
of a Glitch SmartTrigger.

Glitches, dropouts, runts, aperiodicity, missed cycles, slow edges—whatever you call them, they are irregular waveform elements that can wreak havoc with you circuit operation. Because they do not occur with regularity, they can be hard to find and correlate with whatever synchronous events may be causing them. How can you use your oscilloscope to easily find intermittent events where they occur? The answer is by judicious application of the oscilloscope’s measurement statistics and SmartTriggers®.

Measuring Dead Time in 48 V Power Converters, Part 2: Dynamic Measurements

Figure 1. P1 and P2 measure dt@lvl over the entire acquisition,
while P3 and P4 measure dt@lvl for only a single operational
cycle of zoom traces Z1 and Z3.

A primary engineering task for 48 Volt power conversion systems using bridge topologies is to ensure adequate dead time to prevent catastrophic shoot through occurring when both HI and LO FETs conduct at the same time. Being able to accurately measure dead time is therefore of critical importance. Part 1 of this series dealt with the basic dead time measurement. Part 2 will deal with studying the dynamic changes in the dead time measurement using statistical tools like tracks and histogram functions. 

As we learned in part 1, the dead time delay is measured using two instances of the measurement parameter Delta Time at Level (dt@lvl) as shown in Figure 1. 

In the Figure 1, the dt@lvl parameters P1 and P2 show the value of the last measurement in the acquisition which contains 10,000 switching transitions. The parameters P2 and P4 measure only the single timing cycle shown in the zoom traces. (Click any  image to enlarge it and see the detail.)

The values of both parameters are different, and you should ask the question: how does dt@lvl vary with time? To find the answer, turn on the measurement parameter statistics, as shown in Figure 2.

Testing for Near Field Radiated Emissions in the Time Domain

Figure 1. Triggering on a time-domain signal
likely to be coincident with radiated emissions
helps to locate where in the channel di/dt occurs.

There are three, principal root causes of the common currents that lead to radiated emissions in electronic devices:

1. Return path discontinuities 

2. Physical structures that are not tightly coupled to the return plane

3. Ground loops causing common currents in cables 

We’ll briefly demonstrate a bench top test for finding sources of near field radiated emissions caused by return path discontinuities using a real-time oscilloscope in the time domain.

Why the time domain? Although EMC compliance testing is done in the frequency domain, in the time domain we can see the signatures of near field emissions in a way that yields information about the root causes of those emissions. It is a type of pre-compliance EMC testing that can be easily done in your lab, without the expense of an anechoic chamber.

Near Field vs. Far Field Radiated Emissions

Figure 1. The near-field emissions we measure
in the lab may not be an accurate measure of
the far-field emissions on which EMC is certified. 

When we are testing a product on our bench top for EMC, we are in close vicinity to that product in a typically noisy environment. All we can measure is the near field, the electric or magnetic field strength in close proximity to our product. It’s important to keep in mind that near field measurements are not the same as the far field (3 m or more) measurements in the FCC Part 15 Radiated Emissions test described earlier, and here's why. 

Unintentional Antennas in Electric Circuits

Figure 1. Certain design features can introduce
unintentional antennas into electric circuits.

In our last post, we discussed how little radiated emissions it takes for an electronic product to fail an FCC certification test for EMC.

Where do these radiated emissions come from? No one designing an electric circuit board is designing them into their product on purpose. These sneaky antennas do not appear in the schematic. However, we can unwittingly introduce them into our product through certain styles of board and interconnect design features. It is sometimes jokingly said there are two kinds of designers: those who are designing antennas on purpose, and those who aren't doing it on purpose. We’re going to introduce two, basic models of antenna—magnetic dipole and electric dipole (Figure 1)—to reveal a secret source of radiated emissions.

Pre-compliance EMC Testing Using a Real-time Oscilloscope

Figure 1. Formula for calculating radiated power from electric
field measured at a given distance. Only a few nanowatts of
radiated power can cause a product to fail an EMC certification test.

When designing an electric circuit board, we always start with a schematic. All it tells us is the components in use, how they are connected, and what the functionality of the system is. The schematic tells us absolutely nothing about signal integrity, power integrity or electromagnetic interference (EMI). All the schematic tells us about is the connectivity.

Problems with signal integrity, power integrity and EMI all come to life when we turn that schematic into a physical implementation, because once we have connectivity established by the interconnects, the only thing interconnects are going to do is screw up our beautiful design. They're going introduce noise, and that noise is going to cause some combination of signal integrity, power integrity and EMI problems. The best we can do is to minimize its appearance and impact using best design practices.

In this series, we'll focus on design issues that affect EMI, and how you can use a real-time oscilloscope to find the root causes of EMI that negatively affect a product's electromagnetic compatibility (EMC).