Measuring Dead Time in 48 V Power Converters, Part 2: Dynamic Measurements

Figure 1. P1 and P2 measure dt@lvl over the entire acquisition,
while P3 and P4 measure dt@lvl for only a single operational
cycle of zoom traces Z1 and Z3.

A primary engineering task for 48 Volt power conversion systems using bridge topologies is to ensure adequate dead time to prevent catastrophic shoot through occurring when both HI and LO FETs conduct at the same time. Being able to accurately measure dead time is therefore of critical importance. Part 1 of this series dealt with the basic dead time measurement. Part 2 will deal with studying the dynamic changes in the dead time measurement using statistical tools like tracks and histogram functions. 

As we learned in part 1, the dead time delay is measured using two instances of the measurement parameter Delta Time at Level (dt@lvl) as shown in Figure 1. 

In the Figure 1, the dt@lvl parameters P1 and P2 show the value of the last measurement in the acquisition which contains 10,000 switching transitions. The parameters P2 and P4 measure only the single timing cycle shown in the zoom traces. (Click any  image to enlarge it and see the detail.)

The values of both parameters are different, and you should ask the question: how does dt@lvl vary with time? To find the answer, turn on the measurement parameter statistics, as shown in Figure 2.

Measuring Dead Time in 48 V Power Conversion Systems, Part 1: Static Measurements

48 volt power conversion systems input a 48 VDC power bus and output other voltage levels. The key section in the conversion process is the inverter stage. The inverter subsection topology may be half bridge, full or H-bridge, or cascaded H-bridge for 3-phase systems. There is typically a filtering circuit after the inverter before power is passed on to the Load, and a control system that takes care of controlling the entire conversion system. 

Figure 1:Three common topologies for switching inverter stages. The load is connected between upper and lower power switching devices, which are selectively switched on and off to supply power to the load from the DC bus.

The three inverter topologies shown in Figure 1 are all similar in that they use stacked or “totem pole” power devices for switching. 

In operation, each of these topologies provides a path from the DC bus through the load and then to ground (0 V) by turning on selected devices. At no time should there be a direct path from the DC bus to ground, an event called “shoot through.” Designers intentionally add dead time to eliminate the risk of shoot through.