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Showing posts with label transaction layer. Show all posts
Showing posts with label transaction layer. Show all posts

26 July 2021

Anatomy of a PCIe Link

Figure 1: A PCIe link between root complex and end point. Each device has its own transmitter and receiver.
Figure 1: A PCIe link between root complex and end point.
Each device has its own transmitter and receiver.
Peripheral Component Interconnect Express (PCIe®) is a high performance, general-purpose input/output (I/O) interconnect designed for a wide variety of computing and communication platforms. Recent iterations of the standard take advantage of high-speed serial technology, point-to-point interconnects, switch-based technology, and packetized protocol. They rely heavily on link negotiation and link training, so much so that being able to capture and view dynamic link behaviors is essential to debugging PCIe devices. Nevertheless, it remains a pain point for PCIe engineers. Why is it so difficult? To start, let’s break down the PCIe architecture to understand what is going on.