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07 September 2021

Correlating Low to High-Speed Events in Complex Embedded Systems

Figure 1: A challenge when testing embedded systems
is to correlate events in a low-speed interface like SPI
to events in a high-speed interface like PCIe.
A common requirement when testing embedded systems is to measure the timing between signals with low data rates and those with high data rates. Looking at the functional block diagram of our typical deeply embedded system in Figure 1, we see low-speed serial interfaces like SPI and I2C along with high-speed serial links, like PCIe (often serving as the high-speed serial PHY in our diagram).

Take for example testing the initialization of the system. When power is first turned on, the ROM bios and flash memory initialize program elements that are required by the embedded system’s microprocessor. Once the initialization is complete, the microprocessor has to notify the motherboard via PCIe that it is active and ready to receive data via the high-speed serial bus. This all has to happen within 200 milliseconds. 

There are several considerations when measuring these mixed events with an oscilloscope. The first is that you measure at a sample rate at least twice the bandwidth of  the highest speed signal to satisfy the Nyquist criteria. The SPI signal is clocked at 3 MHz, so its bandwidth is low, about 15 MHz, but the PCIe signal bandwidth can be in excess of 8 GHz. The oscilloscope should sample at the higher of the two bandwidths in order to acquire both signals and the intervening delay. 

Figure 2: Timebase descriptor box summarizes the relationship
between sample rate, T/DIV and acquisition memory length.
The next consideration is to actually capture enough of both signals to measure the time between the requisite events, which may consist of each signal reaching a particular voltage level and polarity, or perhaps particular serial data commands being issued. The time required to capture these determines the acquisition memory length required. The relationship between sample rate, time per division (T/DIV) setting, and acquisition memory length is summed up on the oscilloscope’s Timebase descriptor box (Figure 2). Acquisition memory length is a function of the sample rate and horizontal scale factor, or T/DIV setting.  For example, the required acquisition memory length for a T/DIV setting of 500 ms/div at a 10 MS/s sample rate is 50 MS.

Based on this relationship, we can consider how each setting needs to be adjusted to accommodate the mix of low- and high-speed measurement events, as seen in Figure 3. 

Figure 3: Estimating the sample rate, T/DIV setting, and memory length needed
based on the speed of the measured events.

A low-speed event, such as the SPI signal, can require a long record length, but the sample rate needed is relatively low, so the acquisition memory requirement is moderate.  A high-speed event requires a high sample rate, but the record length is short, and a shorter acquisition memory will suffice. It is when we mix low- and high-speed events that the requirements become more complicated.  The sample rate must be high to accommodate the high-speed component of the measurement, but the long delay between the signal components requires a long record length.  Since the sampling rate is fixed, the acquisition memory must be long enough to match the required delay.

If we know we need to capture the full embedded system initialization sequence described earlier, we know we need to acquire at least 200 ms to include the necessary events in both the SPI and the PCIe signals. The mixture of high- and low-speed events requires a 20 GS/s sample rate to accommodate the 8 GHz PCIe signal bandwidth. Since the 200 ms time is distributed over the oscilloscope’s ten horizontal divisions, 20 ms/div horizontal scale is used. With these acquisition settings in place, both the low-speed and high-speed signals are fully characterized and can be zoomed to see the necessary details. The instrument needs to have at least 4 GS of acquisition memory to support this.

Once the time correlated acquisition of both signals is properly configured, multi-zoom locked horizontal relative cursors on each trace can be used to measure the difference between any two times on the acquisition. Depending on the nature of the events measured, different measurement parameters can also be used:

  • Dtime@level (standard) will measure time between two voltage levels on two traces
  • Message to Analog and Analog to Message ("ME" and "MP" serial decode options) will measure the time between a voltage level on an analog trace and a serial data message on another
  • Message to Message ("ME" and "MP" serial decode options) will measure the time between a serial data message on one trace and a serial data message on another

Ultimately, the bandwidth of the signals you must test and the amount of time you need to capture will determine how much sample rate and memory length your instrument needs. Instruments with more of each can be applied to more test scenarios. 8 GHz WavePro HD with ultra-long 5 Gpts memory was designed to be just such a workhorse of embedded system debug.

Watch William Kaunds explain many facets of debugging embedded systems in the on-demand webinar, Debugging Complex Embedded Computing System Issues (Part 2).

Also see:

Debugging Complex Embedded Systems

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