Introduction to Debugging High-Speed Serial Links

Figure 1: These images depict the degradation of serial data
traffic as it makes its way from transmitter to receiver

In recent years, the data rates in serial links have increased exponentially across any number of standard protocols, including PCI Express, USB, and even SATA and SAS. With higher data rates comes more challenges for system designers, validation engineers, and test engineers with respect to signal integrity (SI). Some SI effects are much more prominent at higher data rates than they were for lower-speed versions of the same protocols. In this series of posts, we'll examine these SI effects, look at some methods of improving system performance, and discuss some SI analysis solutions as well as measurement considerations.

Debugging Ethernet, SATA, and PCIe for IoT Devices

Figure 1: A generic IoT block diagram
shows serial-data links in blue

In our ongoing review of debugging serial-data standards for Internet of Things (IoT) devices, let's now turn to three more popular protocols: Ethernet, SATA, and PCIe. Ethernet is found in computer networking applications, while the Serial Advanced Technology Attachment (SATA) connects host bus adapters to mass-storage devices. The Peripheral Component Interconnect Express (PCI Express or PCIe) handles communication between root complexes (motherboards) and expansion-card interfaces.