Figure 1. Noise tolerances for embedded system components are becoming ever tighter. |
Why do we care about voltage rail noise? As electronic designs strive for ever lower power consumption, power rails already carry very low voltages, often 1 V or less. Components like RF receivers, ADCs and DACs can be affected by noise of less than 1% of the rail value (Figure 1). This means noise tolerances can be as tight as single-digit millivolts, which is why power integrity takes up considerable validation time in labs.
Figure 2. A typical modern embedded system includes a power delivery network (PDN, yellow blocks and traces), which must be engineered so that system noise remains within acceptable tolerances. |
- Voltage regulation modules (VRMs) that convert the bulk supply to DC current for consumption by devices
- Board interconnects--the traces and planes that distribute power from the VRMs to the devices that consume power
- Capacitors
Power integrity is most commonly addressed at the board level, but there are applications where it is desirable to look at the power integrity of the on-die distribution network inside an integrated device. (At the end of this post are links to previous posts discussing on-die power rail measurements.) Although these are usually considered separate realms, as we’ll show, there are cases where on-die effects can cause board noise, and vice versa.
First, let’s categorize the types of noise we expect to encounter in a PDN. Whether discussing on-board PDN or on-die PDN, noise can be placed into three broad categories:
- Self-aggression noise—noise inflicted by a PDN component on itself through normal operation
- Board pollution—noise coupled onto board packages and interconnects
- Mutual aggressors— crosstalk coupling from the PDN onto devices
Each type of noise requires distinct measuring techniques, which we’ll describe in our forthcoming posts.
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