Test Happens.

Figure 1: Students gain first-hand experience in Automotive Ethernet protocol testing Teledyne LeCroy's Automotive Technology Cente...

Figure 1: Probes are a key element of the total signal acquisition system In this multipart survey of testing the DDR interface's p...

Figure 1: For analysis purposes. it's critical to separate read and write bursts of interest Last time around, we began examining s...

Figure 1: Shown is a typical BGA package for DDR memory In the first of this series of posts, we undertook a high-level view of physic...

Figure 1: Clock, strobe, and data are three critical signals in DDR test In an earlier post, we took a brief tour through what constitu...

Figure 1: A representative test setup for physical-layer DDR testing Double data-rate (DDR) memory has ruled the roost as the main syst...

Figure 1: Three-phase AC voltages consist of three voltage vectors In a previous post, we briefly covered the basics of single- and thr...