Test Happens.
24 April 2017
Testing the DDR Memory Interface's Physical Layer (Part III)
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Figure 1: For analysis purposes. it's critical to separate read and write bursts of interest Last time around, we began examining s...
11 April 2017
Testing the DDR Memory Interface's Physical Layer (Part II)
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Figure 1: Shown is a typical BGA package for DDR memory In the first of this series of posts, we undertook a high-level view of physic...
05 April 2017
Testing the DDR Memory Interface's Physical Layer (Part I)
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Figure 1: Clock, strobe, and data are three critical signals in DDR test In an earlier post, we took a brief tour through what constitu...
29 March 2017
Fundamentals of the DDR Memory Interface
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Figure 1: A representative test setup for physical-layer DDR testing Double data-rate (DDR) memory has ruled the roost as the main syst...
20 January 2017
Back to Basics: Three-Phase Sinusoidal Voltages
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Figure 1: Three-phase AC voltages consist of three voltage vectors In a previous post, we briefly covered the basics of single- and thr...
08 December 2016
Back to Basics: Fundamentals of AC Line Power (Part II)
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Figure 1: AC line voltage is a single- phase vector that rotates at a given frequency Having reviewed a broad definition of power , ho...
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18 November 2016
Back to Basics: The Fundamentals of Power
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Figure 1: 45% of worldwide power consumption fuels motors Ask any number of engineers to define "power" and you'll get...
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